DS21354L

Product Summary

The DS21354L is a single-chip transceiver (SCT). It contains all the necessary functions to connect to E1 lines. The DS21354L is upward-compatible versions of the DS2153 and DS2154 SCTs. The on-board clock/data recovery circuitry coverts the AMI/HDB3 E1 waveforms to an NRZ serial stream. The DS21354L is also used for extracting and inserting signaling data, Si, and Sa-bit information. The on-board HDLC controller can be used for Sa-bit links or DS0s. The DS21354L contains a set of internal registers that the user can access to control the operation of the units. Quick access through the parallel control port allows a single controller to handle many E1 lines. The DS21354L fully meets all the latest E1 specifications, including ITU-T G.703, G.704, G.706, G.823, G.732, and I.431, ETS 300 011, 300 233, and 300 166, as well as CTR12 and CTR4.

Parametrics

DS21354L absolute maximum ratings: (1)Voltage Range on Any Pin Relative to Ground: -1.0V to +6.0V; (2)Operating Temperature Range: -40 to +85℃; (3)Storage Temperature Range: -55 to +125℃.

Features

DS21354L features: (1)Complete E1 (CEPT) PCM-30/ISDN-PRI Transceiver Functionality; (2)On-Board Long- and Short-Haul Line Interface for Clock/Data Recovery and Waveshaping; (3)32-Bit or 128-Bit Crystal-Less Jitter Attenuator; (4)Frames to FAS, CAS, CCS, and CRC4 Formats; (5)Integral HDLC Controller with 64-Byte Buffers Configurable for Sa Bits, DS0, or Sub-DS0 Operation; (6)Interleaving PCM Bus Operation; (7)8-Bit Parallel Control Port that can be used Directly on Either Multiplexed or Nonmultiplexed Buses (Intel or Motorola); (8)Extracts and Inserts CAS Signaling; (9)Detects and Generates Remote and AIS Alarms; (10)Programmable Output Clocks for Fractional E1, H0, and H12 Applications; (11)Fully Independent Transmit and Receive Functionality; (12)Full Access to Si and Sa Bits Aligned with CRC-4 Multiframe; (13)Four Separate Loopback Functions for Testing Functions; (14)Large Counters for Bipolar and Code Violations, CRC4 Codeword Errors, FAS Word Errors, and E Bits; (15)IEEE 1149.1 JTAG-Boundary Scan Architecture; (16)Pin Compatible with DS2154/52/352/552 SCTs; (17)3.3V (DS21354) or 5V (DS21554) Supply; Low-Power CMOS; (18)100-pin LQFP package (14mm × 14mm).

Diagrams