Product Summary

The Shift Register MC74HC595ADTR2G consists of an 8 bit shift register and an 8 bit D type latch with three state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8 bit latch. The shift register and latch have independent clock inputs. The MC74HC595ADTR2G also has an asynchronous reset for the shift register. The MC74HC595ADTR2G directly interfaces with the SPI serial data port on CMOS MPUs and MCUs.

Parametrics

MC74HC595ADTR2G maximum ratings: (1)Vcc: -0.5 to 7.0V; (2)Vin: -0.5 to Vcc 0.5V; (3)Vout: -0.5 to Vcc 0.5V; (4)Iin: ±20mA; (5)Iout: ±35mA; (6)Icc: ±75mA; (7)Tstg: -65 to +150℃; (8)TL: 260℃.

Features

MC74HC595ADTR2G features: (1)Output Drive Capability: 15 LSTTL Loads; (2)Outputs Directly Interface to CMOS, NMOS and TTL; (3)Operating Voltage Range: 2.0 to 6.0 V; (4)Low Input Current: 1.0 μA; (5)In Compliance with the Requirements Defined by JEDEC Standard No. 7A; (6)Chip Complexity: 218 FETs or 54.5 Equivalent Gates.

Diagrams

MC74HC595ADTR2G LOGIC DIAGRAM

Image Part No Mfg Description Data Sheet Download Pricing
(USD)		 Quantity
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25-100: $0.13
100-500: $0.11
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