SC16C752IB48

Product Summary

The SC16C752IB48 is a dual universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs, automatic hardware/software flow control, and data rates up to 5 Mbits/s (3.3 V and 5 V). The SC16C752IB48 offers enhanced features. It has a transmission control register (TCR) that stores receiver FIFO threshold levels to start/stop transmission during hardware and software flow control. With the FIFO RDY register, the software gets the status of TXRDY/RXRDY for all four ports in one access. The SC16C752IB48 provides the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows on-board diagnostics.

Parametrics

SC16C752IB48 absolute maximum ratings: (1)VCC, supply voltage: 7 V; (2)VI, input voltage: -0.3 to VCC + 0.3 V; (3)VO, output voltage: -0.3 to VCC + 0.3 V; (4)Tamb, operating ambient temperature in free-air: -40 to +85℃; (5)Tstg, storage temperature: -65 to +150℃.

Features

SC16C752IB48 features: (1)Pin compatible with SC16C2550 with additional enhancements; (2)Up to 5 Mbits/s baud rate (at 3.3 V and 5 V; at 2.5 V maximum baud rate is 3 Mbits/s); (3)64-byte transmit FIFO; (4)64-byte receive FIFO with error flags; (5)Programmable and selectable transmit and receive FIFO trigger levels for DMA and interrupt generation; (6)Software/hardware flow control: Programmable Xon/Xoff characters; Programmable auto-RTS and auto-CTS; (7)Optional data flow resume by Xon any character; (8)DMA signalling capability for both received and transmitted data; (9)Supports 5 V, 3.3 V and 2.5 V operation; (10)Software selectable baud rate generator; (11)Prescaler provides additional divide-by-4 function; (12)Fast databus access time; (13)Programmable sleep mode; (14)Programmable serial interface characteristics: 5, 6, 7, or 8-bit characters; Even, odd, or no parity bit generation and detection; 1, 1.5, or 2 stop bit generation; (15)False start bit detection; (16)Complete status reporting capabilities in both normal and sleep mode; (17)Line break generation and detection; (18)Internal test and loop-back capabilities; (19)Fully prioritized interrupt system controls; (20)Modem control functions (CTS, RTS, DSR, DTR, RI, and CD).

Diagrams